Failed power_dist r4 designs (part 4)

For context, see part 1, part 2, or part 3.


My first attempt at an r4 design was based on the TI LM5066 hot swap controller. It is one of the more full featured controllers, since it supports built in energy monitoring over a SPI bus with no additional components. This first iteration was actually surprisingly close to being workable. There were two factors that it performed poorly on, quiescent current and energy monitoring. The quiescent current was similar to the r3.1 version. Energy monitoring was present, but at the full scale range necessary for power_dist, it was almost unusably inaccurate. With a design set for a peak of 100A, and also the lower 25mV current sense range, the current noise was measured in multiple amps.

I definitely wanted usable energy monitoring, and wasn’t quite ready to sacrifice the quiescent current, so decided to try again.


This version was based on the Analog LTC4380, nominally a “surge stopper” rather than a hot swap controller. I was attracted to it because it seemed like it would offer a similar pre-charge function, but with a much reduced quiescent current. I implemented energy monitoring using a separate Analog LT1787 high side current sense monitor which was fed into the op-amps on the STM32G474.

This version had multiple new and different problems. For one, the “fault timer” on the LT4380 is active during the “pre-charge” window. It turned out to be impossible to select a pre-charge speed that would handle a reasonable capacitance while simultaneously not triggering the fault timer.

Secondly, I discovered that the LT1787 has a relatively high output impedance, such that significant error was introduced by feeding it directly into an inverting op-amp with gain on the STM32G4. The G4 is relatively configurable, but there was no way with the existing PCB to first run it through a buffer op-amp to improve the impedance before moving to a gain stage (and only then on to the onboard ADC).

Finally, this version had the first incarnation of a “latching” circuit that would allow the processor to shut off power to the entire 3.3V bus when desired, but flipping the primary power switch would turn it back on. Thus the processor could decide how long to run after the primary power switch was turned off. Unfortunately, this circuit had several problems in this iteration that needed resolving.


This version used the TI TPS2490 hot swap controller along with the same LTC1787 high side current sense amplifier. It re-arranged the current sense input so that the STM32G4 could first buffer, then amplify the signal before handing it off to the ADC. The biggest problem here was once again the circuit that attempted to let the STM32G4 shut itself off to lower quiescent current. It ended up being unworkable, and also rendered the TPS2490’s under-voltage protection non-functional.


This version is basically the one that went into production. It still uses the TPS2490 and LTC1787, but now has a simpler latching mechanism, and undervoltage protection that actually works.


The only changes here are silk-screen modifications!

Next up

In the next, and final post, I’ll introduce r4.3b and its specifications!